kt B! "d C ; i "q 1  8  W 1oD)$D58zi-=)k=!1:EMW2E7x#skH(H&'E&ma+!$M%r$ %>)[ 3 -3N&&8$ .H"e))!00a&w 9 =T     + % ! F! g!!:!! !"1"E"_"w""""" #3$%C#%;g%i% &&;&9[&&W(1*D+)\+$+B+6+j%,,,,(,<- B-c-0-9--L .WV.3/5/#0t<0l0(1IG12'2&223` 5m5*5$5/5. 6:6X6 t6%66)67 7A73[77 737&7&&88M8$888"8)9/9I9 :((:Q:n:":0::&:;2;N;c;};9;=;!<%1<W<r<*<"< < =!=:7=r= =====>/>N>h>>i,3?j' S9KbYU6eR/`Q=^WgJ5:"D.+;H!GL]%aF&>cPNVh04f7ZT\X k 1_d*OB[E-2#< (8CIA@$ )M  --divide do not treat `/' as a comment character --divide ignored -O try to optimize code. Implies -parallel -mtune=CPU optimize for CPU, CPU is one of: -n Do not optimize code alignment -q quieten some warnings -s ignored @FILE read options from FILE %s: unrecognized processor name'%s' is not repeatable. Resulting behavior is undefined.-KPIC, -call_shared generate SVR4 position independent code -call_nonpic generate non-PIC code that can operate with DSOs -mvxworks-pic generate VxWorks position independent code -non_shared do not generate code that can operate with DSOs -xgot assume a 32 bit GOT -mpdr, -mno-pdr enable/disable creation of .pdr sections -mshared, -mno-shared disable/enable .cpload optimization for position dependent (non shared) code -mabi=ABI create ABI conformant object file for: -l use 1 word for refs to undefined symbols [default 2] -pic, -k generate position independent code -S turn jbsr into jsr --pcrel never turn PC-relative branches into absolute jumps --register-prefix-optional recognize register names without prefix character --bitwise-or do not treat `|' as a comment character --base-size-default-16 base reg without size is 16 bits --base-size-default-32 base reg without size is 32 bits (default) --disp-size-default-16 displacement with unknown size is 16 bits --disp-size-default-32 displacement with unknown size is 32 bits (default) .sblock may be used for initialized sections only68040 and 68851 specified; mmu instructions may assemble incorrectly: unrecognizable hyperprivileged register: unrecognizable privileged registerAbsolute PC-relative value in relaxation code. Assembler error.....Absolute value in relaxation code. Assembler error.....Address mode *+ARx is not allowed in memory-mapped register addressing. Resulting behavior is undefined.Can not do %d byte %srelocationCan not do %d byte pc-relative pic relocationCan not do %d byte pc-relative relocationCan not do %d byte pc-relative relocation for storage type %dCan not do %d byte pic relocationCan not do %d byte relocationCan not do %d byte relocation for storage type %dCan not represent %s relocation in this object file formatCan not set dlx_skip_hi16_flagCondition <%c%c> in structured control directive can not be encoded correctlyD10V options: -O Optimize. Will do some operations in parallel. --gstabs-packing Pack adjacent short instructions together even when --gstabs is specified. On by default. --no-gstabs-packing If --gstabs is specified, do not pack adjacent instructions together. Immediates %d and %d will give undefined behavior.Incorrect fr_opcode value in frag. Internal error.....Instruction `%s' is not recognized.Instructions using long offset modifiers or absolute addresses are not repeatable. Resulting behavior is undefined.Instructions which cause PC discontinuity are not allowed in a delay slot. Resulting behavior is undefined.Invalid use of parallelization operator.MCORE specific options: -{no-}jsri2bsr {dis}able jsri to bsr transformation (def: dis) -{no-}sifilter {dis}able silicon filter behavior (def: dis) -cpu=[210|340] select CPU type -EB assemble for a big endian system (default) -EL assemble for a little endian system Opcode `%s' is not recognized.Operand `%x' not recognized in fixup16.Operand `%x' not recognized in fixup8.Option `%s' is not recognized.SH options: --little generate little endian code --big generate big endian code --relax alter jump instructions for long displacements --renesas disable optimization with section symbol for compatibility with Renesas assembler. --small align sections to 4 byte boundaries, not 16 --dsp enable sh-dsp insns, and disable floating-point ISAs. --allow-reg-prefix allow '$' as a register name prefix. --isa=[any use most appropriate isa | dsp same as '-dsp' | fpSemantics error. This type of operand can not be relocated, it must be an assembly-time constantSubtype %d is not recognized.Symbol `%s' can not be both weak and commonTried to .set unrecognized mode `%s'Unbalanced parenthesis in %s operand.Unbalanced parenthesis in operand %dUnrecognized .LEVEL argument Unrecognized .type argumentUnrecognized condition code "%s"Unrecognized dependency specifier %d Unrecognized field type '%c'Unrecognized indirect address format "%s"Unrecognized instruction "%s"Unrecognized opcode format: `%s'Unrecognized opcode: `%s'Unrecognized operand list '%s' for instruction '%s'Unrecognized option '-x%s'Unrecognized option following -KUnrecognized or unsupported floating point constantUnrecognized parallel instruction "%s"Unrecognized parallel instruction '%s'Unrecognized parallel instruction combination "%s || %s"Unrecognized predicate relation typeUnrecognized section '%s'Unrecognized status bit "%s"Unrecognized struct/union tag '%s'Unrecognized substitution symbol functionUnrecognized version '%s'VMS options: -+ encode (don't truncate) names longer than 64 characters -H show new symbol after hash truncation -replace/-noreplace enable or disable the optimization of procedure calls architecture `%s' unrecognizedcan not do %d byte pc-relative relocationcan not do %d byte relocationcan not resolve expressioncannot honor width suffix -- `%s'condition not followed by conditionalizable insncpu `%s' unrecognizeddsp immediate shift value not constantexpected closing parenextension `%s' unrecognizedinvalid abi -mabi=%sinvalid movx dsp registerinvalid movy dsp registerjunk at end of line, first unrecognized character is `%c'junk at end of line, first unrecognized character valued 0x%xmismatched parenthesesmissing closing parenthesisoption `%s' not recognizedparentheses ignoredsymbol `%s' can not be both weak and commonunbalanced parenthesis in operand %d.unknown floating point abi `%s' unrecognized .linkonce type `%s'unrecognized CPS flagunrecognized characters at end of parallel processing insnunrecognized default cpu `%s'unrecognized emulation name `%s'unrecognized fopt optionunrecognized opcodeunrecognized option -%c%sunrecognized reloc typeunrecognized relocation suffixunrecognized section attributeunrecognized section typeunrecognized symbol type "%s"unrecognized syntax mode "%s"Project-Id-Version: binutils Report-Msgid-Bugs-To: FULL NAME PO-Revision-Date: 2016-10-29 14:17+0000 Last-Translator: Anthony Harrington Language-Team: English (Australia) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Plural-Forms: nplurals=2; plural=n != 1; X-Launchpad-Export-Date: 2024-09-02 18:57+0000 X-Generator: Launchpad (build 1b1ed1ad2dbfc71ee62b5c5491c975135a771bf0) --divide do not treat `/' as a comment character --divide ignored -O try to optimise code. Implies -parallel -mtune=CPU optimise for CPU, CPU is one of: -n Do not optimise code alignment -q quieten some warnings -s ignored @FILE read options from FILE %s: unrecognised processor name'%s' is not repeatable. Resulting behaviour is undefined.-KPIC, -call_shared generate SVR4 position independent code -call_nonpic generate non-PIC code that can operate with DSOs -mvxworks-pic generate VxWorks position independent code -non_shared do not generate code that can operate with DSOs -xgot assume a 32 bit GOT -mpdr, -mno-pdr enable/disable creation of .pdr sections -mshared, -mno-shared disable/enable .cpload optimisation for position dependent (non shared) code -mabi=ABI create ABI conformant object file for: -l use 1 word for refs to undefined symbols [default 2] -pic, -k generate position independent code -S turn jbsr into jsr --pcrel never turn PC-relative branches into absolute jumps --register-prefix-optional recognise register names without prefix character --bitwise-or do not treat `|' as a comment character --base-size-default-16 base reg without size is 16 bits --base-size-default-32 base reg without size is 32 bits (default) --disp-size-default-16 displacement with unknown size is 16 bits --disp-size-default-32 displacement with unknown size is 32 bits (default) .sblock may be used for initialised sections only68040 and 68851 specified; MMU instructions may assemble incorrectly: unrecognisable hyperprivileged register: unrecognisable privileged registerAbsolute PC-relative value in relaxation code. Assembler error...Absolute value in relaxation code. Assembler error...Address mode *+ARx is not allowed in memory-mapped register addressing. Resulting behaviour is undefined.Cannot do %d byte %srelocationCannot do %d byte pc-relative pic relocationCannot do %d byte pc-relative relocationCannot do %d byte pc-relative relocation for storage type %dCannot do %d byte pic relocationCannot do %d byte relocationCannot do %d byte relocation for storage type %dCannot represent %s relocation in this object file formatCannot set dlx_skip_hi16_flagCondition <%c%c> in structured control directive cannot be encoded correctlyD10V options: -O Optimise. Will do some operations in parallel. --gstabs-packing Pack adjacent short instructions together even when --gstabs is specified. On by default. --no-gstabs-packing If --gstabs is specified, do not pack adjacent instructions together. Immediates %d and %d will give undefined behaviour.Incorrect fr_opcode value in frag. Internal error...Instruction `%s' is not recognised.Instructions using long offset modifiers or absolute addresses are not repeatable. Resulting behaviour is undefined.Instructions which cause PC discontinuity are not allowed in a delay slot. Resulting behaviour is undefined.Invalid use of parallelisation operator.MCORE specific options: -{no-}jsri2bsr {dis}able jsri to bsr transformation (def: dis) -{no-}sifilter {dis}able silicon filter behaviour (def: dis) -cpu=[210|340] select CPU type -EB assemble for a big endian system (default) -EL assemble for a little endian system Opcode `%s' is not recognised.Operand `%x' not recognised in fixup16.Operand `%x' not recognised in fixup8.Option `%s' is not recognised.SH options: --little generate little endian code --big generate big endian code --relax alter jump instructions for long displacements --renesas disable optimisation with section symbol for compatibility with Renesas assembler. --small align sections to 4 byte boundaries, not 16 --dsp enable sh-dsp insns, and disable floating-point ISAs. --allow-reg-prefix allow '$' as a register name prefix. --isa=[any use most appropriate isa | dsp same as '-dsp' | fpSemantics error. This type of operand cannot be relocated, it must be an assembly-time constantSubtype %d is not recognised.Symbol `%s' cannot be both weak and commonTried to .set unrecognised mode `%s'Unbalanced bracket (parenthesis) in %s operand.Unbalanced bracket (parenthesis) in operand %dUnrecognised .LEVEL argument Unrecognised .type argumentUnrecognised condition code "%s"Unrecognised dependency specifier %d Unrecognised field type '%c'Unrecognised indirect address format "%s"Unrecognised instruction "%s"Unrecognised opcode format: `%s'Unrecognised opcode: `%s'Unrecognised operand list '%s' for instruction '%s'Unrecognised option '-x%s'Unrecognised option following -KUnrecognised or unsupported floating point constantUnrecognised parallel instruction "%s"Unrecognised parallel instruction '%s'Unrecognised parallel instruction combination "%s || %s"Unrecognised predicate relation typeUnrecognised section '%s'Unrecognised status bit "%s"Unrecognised struct/union tag '%s'Unrecognised substitution symbol functionUnrecognised version '%s'VMS options: -+ encode (don't truncate) names longer than 64 characters -H show new symbol after hash truncation -replace/-noreplace enable or disable the optimisation of procedure calls architecture `%s' unrecognisedcannot do %d byte pc-relative relocationcannot do %d byte relocationcannot resolve expressioncannot honour width suffix -- `%s'condition not followed by conditionalisable insncpu `%s' unrecognisedDSP immediate shift value not constantexpected closing bracketextension `%s' unrecognisedinvalid ABI -mabi=%sinvalid movx DSP registerinvalid movy DSP registerjunk at end of line, first unrecognised character is `%c'junk at end of line, first unrecognised character valued 0x%xmismatched brackets (parentheses)missing closing bracket (parenthesis)option `%s' not recognisedbrackets (parentheses) ignoredsymbol `%s' cannot be both weak and commonunbalanced brackets in operand %d.unknown floating point ABI `%s' unrecognised .linkonce type `%s'unrecognised CPS flagunrecognised characters at end of parallel processing insnunrecognised default cpu `%s'unrecognised emulation name `%s'unrecognised fopt optionunrecognised opcodeunrecognised option -%c%sunrecognised reloc typeunrecognised relocation suffixunrecognised section attributeunrecognised section typeunrecognised symbol type "%s"unrecognised syntax mode "%s"